| Design Task |
Deliverable |
Notes |
| 1) FPGA specification
and requirements document creation (or review) |
FPGA_spec.doc |
Supplied by customer
or created as part of the development. |
| 2) FPGA external
interface analysis and pinlist |
preliminary FPGA
pinout |
|
| 3) Digital circuit
design. |
FPGA_block_diag.ppt |
Block diagram of all
digital circuits. Adds detail to any existing specification
diagrams as submitted by customer. |
| 4) Detailed HDL
language coding |
FPGA_source files |
Support VHDL and
Verilog. We recommend using VHDL if possible. |
| 5) Functional
simulation and debugging |
simulation vector
files |
Functional simulation
vectors and actual simulation. |
| 6) Device fit and
timing analysis |
|
|
| 7) Timing simulation
and debugging |
simulation vector
files with timing information |
Full timing simulation
is time consuming and is not as critical when working with FPGAs
(unlike ASIC devices). |
| 8) Lab verification
and debug |
|
|
| 9) Code updating and
creation of final design package |
Design .zip archive
for customer |
|
